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Abstract: This paper introduces Atmel's AT91M40800 chip based on ARM7TDMI core, and introduces the design of an embedded audio video processing system based on AT91M40800. The system can provide a good solution for systems such as building video intercom and remote real-time monitoring.Keywords: AT91M40800 audio and video processing embedded system codec
introduction
Image (audio, video) acquisition and processing is the core technology in modern building automation, video intercom, video conferencing and remote real-time monitoring systems. The video intercom and security surveillance products on the market are mainly analog channels and are transmitted by coaxial electricity. Due to the weakening of the analog signal, the transmission distance is limited and the effect is not satisfactory. Changing the traditional image simulation process to digital processing and transmission can greatly improve image quality and monitoring efficiency, and make the entire system easy to maintain.
With the continuous development of embedded systems, even embedded audio/video processing systems of ARM or DSP are gradually replacing traditional image processing systems, showing a strong development trend.
1 chip introduction
1.1 The basic composition and internal structure of the chip
The AT91M40800 is a very cost-effective chip in the AT91 16/32-bit microcontroller family from Atmel. It is based on the ARM7TDMI core and includes a high-performance 32-bit RISC processor, 16-bit high-integration instruction set, 8KB on-chip SRAM, programmable external bus interface (EBI), 3-channel 16-bit counter/timer, and 32 programmable I/O port, interrupt controller, 2 USARTs (each with 2 dedicated external data controllers), programmable watchdog timer, main clock circuit and DRAM timing control circuit, and equipped with advanced energy-saving circuits At the same time, it can support JTAG debugging, the main frequency can reach 40MHz.
The internal structure module of AT91M40800 is shown as in Fig. 1.
1.2 Overall characteristics of the chip
The ARM7TDMI core of the AT91M40800 integrates an embedded ICE interface with two main types of buses: the system bus and the peripheral bus. The system bus connects the ARM7TDMI core with on-chip memory, peripheral bus interface, and AMBA bridge circuitry; the peripheral bus is driven by the AMBA bridge circuitry. Through the programmable external bus interface, it can be directly connected to off-chip memory (such as Flash, ROM, etc.) for data exchange. A vector interrupt controller with eight levels of priority can significantly improve the real-time performance of audio and video acquisition by connecting peripheral data controllers.
2 system composition and principle
2.1 System composition and chip selection
This system is mainly composed of the following major parts.
(1) Video A/D conversion section
The conversion of analog video signals collected from ordinary CCD cameras to digital video signals is completed, mainly using the SAA7113 chip of Philips. The SAA7113 is a powerful programmable video input processing chip that can simultaneously access four channels of video signals using I2C bus technology.
(2) Audio codec section
Mainly realizes the encoding and decoding of the audio signal entering from the microphone, using the UDA1344 of Philips. It combines A/D and D/A conversion functions to A/D convert analog sound signals from the microphone to form a serial digital audio stream.
(3) Audio and video magnetic field strength processing part
The input composite audio and video streams are compressed, and the core chip is selected by Taiwan Winbond Electronics W99200F. The chip has powerful internal features and a variety of operating modes to choose from, seamlessly coupled to audio codecs and video decoder chips.
(4) Logic gate control section
The FPGA is used for logic and timing control, and the XC2S50E logic control chip of Xilinx SPARTAN-IIE series is adopted. On-chip integration of a variety of system functions, such as digital delay phase-locked loop (DLL), FIFO memory, converters and bus interface (PCI), can implement multiple algorithms in parallel.
(5) Embedded data processing part
The AT91M40800 is an embedded core chip, mainly for system control and data processing.
(6) Network connection part
The audio and video streams are sent to the network for transmission in the form of UDP packets through the Ethernet control chip. The RTL8019AS manufactured by Realtek Corporation is used as the main control chip. The chip complies with the Ethernet II and IEEE802.3 standards and is available in full-duplex mode with 8 interrupt request lines and 16 I/O base addresses to choose from.
2.2 system principle block diagram and working principle
   The principle block diagram of this system is shown in Figure 2.
The video analog signal collected by the CCD camera is sent to the A/D conversion chip for video decoding. The SAA7113 chip decodes the analog reset signals of different formats such as PAL and NISC into luminance and chrominance signals, outputs the standard digital video YUV4:2:2 format, and generates the field sync reference signal VREF and the line sync reference signal HREF. At the same time, the audio codec chip UDA1344 decodes the analog sound signal input by the microphone, and the formed serial digital audio stream is combined with the output digital video stream, and sent to the chip W99200F for image compression in the M-PEG format. The chip has powerful internal functions such as video preprocessing, image cropping, motion estimation unit, motion image compensation, quantization table, variable length coding (generating bit stream to SDRAM), and is responsible for compressing and synchronizing the received data stream. Video signal. The audio and video streams output by the compression processing are directly input into the AT91M40800 through the external buffer FIFO for overall system data processing. After the embedded system is initialized, the interrupt request method is used to complete the data acquisition and program access. At the same time, the A/D conversion chip is initialized through the I2C bus and its working state and working mode are controlled.
In the meantime, the logic and timing control of the various components is done by the FPGA, which controls the interrupt request and some chip select signals. The XC2S50E contains internal resources such as logic operation, digital monitoring and interface control unit. In the interface control with the image compression chip, it mainly performs functions such as address generation, handshake logic, and timing control. When it is detected that the parity synchronization flag signal RTS0 output by the SAA7113 chip is high level, this is used as the timing starting point of the process of collecting data, and the sampling enable signal and the address strobe signal are output; and the pixel delay end signal is received, and correspondingly generated. Write address and write signal. When XC2S50E is initialized, set DONE to low level and set INIT to low when the memory is cleared. This resets PROGRAM and inputs the data stream.
After receiving the valid signal of the embedded CPU to collect data, it controls the action of the A/D chip sampling process; when the acquisition and compression of one frame of data is completed, the FPGA sends an interrupt request signal to the AT91M40800 and waits for a response. After the system data is processed by the embedded processor, it is sent to the Ethernet control chip RTL8019AS, and finally transmitted to the network as a UDP packet. If the other end of the network is equipped with a terminal, after receiving the data transmitted by the network, the audio and video can be decoded, and the video data is echoed, and the audio data is played. The audio data is played back by echoing the same one. Through the same reverse process, the visual intercom function can also be realized.
3 Conclusions and prospects
The embedded audio and video processing system based on AT91M40800 chip can ensure the quality of audio and video and the real-time data processing, with good reliability and flexibility. Although there are some challenges in real-time network transmission and system software programming, with the continuous development of embedded systems and image processing technologies, these will not become obstacles to the promotion and application of the system. Applying it to the fields of video intercom, remote monitoring, visual IP telephony, etc., will have broad development prospects and application market.
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