A remote data acquisition system was developed to address the challenges of data transmission in remote naval areas. This system integrates GPS (Global Positioning System) and GIS (Geographic Information System) technologies, enabling intelligent and standardized data management. It ensures that critical information can be collected, transmitted, and stored efficiently, even in locations with limited connectivity.
The system is composed of two main components: the data acquisition unit and the central management system. The data collection module includes a watchdog circuit, data storage, communication interface, and a Modem (as shown in Figure 1). These elements work together to ensure continuous and reliable operation, even under unstable power conditions or environmental disturbances.
Figure 1: Remote Data Acquisition System Structure
Power-down protection plays a crucial role in ensuring system stability. In the event of sudden power loss or voltage drop, the system may become unresponsive or fail to restart properly. To prevent this, a power-down protection circuit is implemented. This circuit typically includes a low-power CMOS-RAM, a power supply circuit, and a control mechanism. When the main power fails, the backup battery takes over, maintaining power to the RAM to preserve critical data and system state.
One key challenge arises when the microprocessor's reset signal and the power-down protection signal are not synchronized. This mismatch can lead to data corruption or system failure. To resolve this, a microprocessor monitoring circuit is used to synchronize the reset process with the power-down protection. This ensures that the memory remains protected during system resets and is accessible when the system is operational. The MAX791 microprocessor monitor is specifically designed for this purpose.
MAX791 is a high-performance microprocessor monitoring IC from Maxim Integrated, available in a 16-pin DIP package. It offers multiple features including microprocessor reset, battery backup, watchdog functionality, CMOS-RAM write protection, and power failure alarms. Its logic block diagram is illustrated in Figure 2. Key pins include VCC and Vout for power input and output, Vbatt for battery input, LOWLINE for power low detection, and various watchdog-related signals such as SWT, WDI, WDO, and WDP. Additionally, the PFI and PFO pins detect power failure events, triggering an alarm when the input voltage drops below 1.25V.
Figure 2: MAX791 Logic Block Diagram
Figure 3: Power-Down Protection Circuit Diagram
The MAX791-based power-down protection circuit enhances system reliability by ensuring uninterrupted data integrity. The RST signal from the MAX791 is connected to the memory chip enable (CE) pin. When the VCC voltage drops below the threshold, the RST output remains low, preventing improper system behavior. A diode, such as IN4148, is used to switch between the main power supply and the backup battery. Under normal conditions, VCC charges the battery and powers the system. When the main power is lost, the battery supplies power through the MAX791 to the memory only, preserving its contents.
Another important feature of the MAX791 is its power alarm function. When the VCC voltage drops to 4.65V ± 150mV, the LOWLINE pin generates a negative transition, signaling the microcontroller to trigger an interrupt. During this brief period, the system can save critical data, such as breakpoints and real-time parameters, into non-volatile memory. Once power is restored, the system can resume execution from the saved point, minimizing data loss and system downtime.
In conclusion, compared to traditional watchdog circuits, the MAX791-based single-chip power-down protection system offers superior stability, speed, and reliability. It significantly improves the robustness of embedded systems, especially in harsh or remote environments. Its practical application has proven to be highly effective, making it a preferred choice for critical data acquisition and monitoring systems.
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