The so-called fixed-point decimal is the data that the decimal point implicitly implies in a certain position. Since the position of the decimal point is fixed, there is no need to store it (if the position of the decimal point is stored, it is a floating-point number). The specific location of the decimal point is completely determined by the programmer himself. Therefore, for the processing of fixed-point decimals, it is entirely possible to use ordinary integer processing.
Let's briefly talk about the regular format of decimals, the advantages and disadvantages of floating-point decimals, and how to use Lattice ECP3/ECP5 sysDSP multipliers to implement basic fixed-point decimals (addition and multiplication). In the following articles, we will introduce the division of fixed-point decimals, the square root, the inverse of the square root, and the basic theory of CORDIC algorithm and the implementation of HDL.
1, the regular format of fixed-point decimals
The conventional fixed-point decimal format is as follows:
Among them, the value of signed fixed decimal can be expressed as:
The value of an unsigned fixed-point decimal can be expressed as:
The bit width w of the fixed-point number and the bit width wf of the fractional part can be considered as two elements of the fixed-point number. Among them, w determines the dynamic range of the fixed-point number, wf determines the precision of the fixed-point number. It should be noted that when performing fixed-point arithmetic, it is necessary to pay attention to the problem of numerical overflow (including upward overflow and downward overflow). The so-called upward overflow means that the result of the operation exceeds the range that can be represented by the integer part of the fixed-point number, and the overflow indicates that the result of the operation exceeds the range that can be represented by the fractional part of the fixed-point number. Obviously, once it overflows, it will cause the loss of calculation accuracy, even the result of the calculation. Therefore, it is important to choose w and wf reasonably. The values ​​of w and wf are too large to waste resources, and too small will cause loss of accuracy.
2. Comparison between fixed-point and floating-point numbers
Compared to floating-point numbers, fixed-point numbers have the following advantages:
(1) Less resources
When floating point operations are performed in FPGAs, more LUTs, registers, and multipliers are consumed. Since the fixed-point number does not need to store the position of the decimal point, the resources consumed by the operation of the fixed-point number are basically equivalent to the same bit-width integer arithmetic, far lower than the overhead of the floating-point arithmetic.
(2) Higher performance
Floating-point operations consume more resources while also putting pressure on MAP and PAR, resulting in a reduction in the Fmax of the entire design. With the same amount of computation, using a fixed-point design can achieve a higher Fmax.
At the same time, there are many defects and deficiencies in fixed-point numbers relative to floating-point numbers:
(1) The dynamic range that can represent the value is smaller
(2) The problem of numerical overflow
Because floating-point numbers adopt the unified format (IEEE-754) and the dynamic range is very large, there is basically no problem of numerical overflow. However, the fixed-point number requires a reasonable selection of the values ​​of w and wf in the program design, and the lack of a uniform format specification also causes troubles for the collaborative design of complex programs.
From the point of view of application requirements, in many cases, the fixed point number can be used to meet the performance requirements of the system, but there are also occasions where the accuracy requirements are very high, such as radar imaging, medical imaging, high-precision data acquisition and analysis, etc. Floating point operations.
3, sysDSP multiplier in Lattice ECP3/ECP5
Lattice's ECP3/ECP5 series FPGAs integrate multiple sysDSP architecture multiplier modules. Based on sysDSP, users can easily design low power and high performance digital signal processing applications. Compared to multipliers implemented with LUTs, sysDSP-based multipliers offer significant performance advantages. In addition, Lattice also offers a variety of sysDSP-based IP, such as FFT, FIR, and CIC.
The slice structure diagram of sysDSP in ECP5 is shown as follows:
4. Addition and multiplication of fixed-point decimals
Addition and multiplication of fixed-point decimals is basically the same as addition and multiplication of ordinary integers, but it is necessary to pay attention to the correspondence between the w and wf of the operation result and the original values ​​of w and wf.
Here is a simple example: multiplying two 32-bit signed fixed-point decimals, where w=32 and wf=23. which is
at this time,
We can use Clarity directly to generate an integer multiplier module, as shown below. The sign bit can be extracted for XOR operation, and the remaining 31 bits are multiplied.
If you need to convert the result of the operation to the same format as the input, you can do the following:
In the above example, the signed number is converted to an unsigned number and then the operation is performed (that is, the original code is directly used for calculation). In fact, we can also directly configure the Data Type in the MULT Module as Signed, and the operands will be operated in complements.
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